(Solved) : Infoddeti H Operating System Quiz 1 Winter 2019 Von Neumann Architecture Refers Design Ce Q34284516 . . .
It’s a test I just need the answer quike please if ucan
Infoddetióh to Operating System Quiz 1: Winter 2019 . Von Neumann architecture refers to the design of the Central Processing Unit, consisting of a. Bios and main memory b. Control unit, System bus and ALU c. Registers d. Control unit, ALU and registers e. RAM 2. During the fetch and execute cycle the CPU’s Control unit: a. retrieves instructions from primary memory b. decodes instruction sets and increments a pointer to next instructions c. executes instructions and write results back to register d. all of the above e, only choices “a” and “c” 3. Instruction set architecture (ISA) refers to: a. high level programming languages providing direct instructions to the CPU b. the physical circuits and connections within the CPU, which allow it to receive program instructions c. part of a computer relating to machine language programming, providing a set of commands to the CPU, to tell it what it needs to do. d. The bus pathways for data and instructions to travel within the CPU 4. All of the following are part of the CPU’s instruction set except: e. Move a. Add b. Jump c. Print d. Branch 5. Progranaming lwngcu whicey citer o the CPU’s machine code are b. High level languages d. Level 1 programs 6. Computer software which transforms a user’s program source code into machine code one statement at a time is called a(n): a. Kernel b. Opcode e. either choice “c” or “d” c. Compiler d. Interpreter them into a low -level . A program that reads all statements from a user program and converts omputer language at one time: compilerinterpreter The instructions directly executed by the CPU are in the form of e. none of these a.ISA b. compiler d. high level e. hexadecimals a. machine language b. high level program code c. Boolean operators d. any of the above 19, requiring lots of memory is mi sor architecture utilizing small, highly optimized set of instructions ー a. RISC b. Assembler code c. ISA d. CISC e. Floating point notation 20. CISC processors differ from RISC processor in that: a. CISC processors need less memory than RISc b. RISC CPUs generally run at faster clock speeds than CISC e. CISC has larger, more feature-rich instruction set d. CISC is newer technology found in various digital devices e. choices “a”, “b” and e” Question 21-30, True/False 21. Computer architecture refers to how a computer system is designed and what technologies it is compatible with. 22. Word size is the number of bits the microprocessor’s registers can hold and process at a single time. 23. Computers only process and store data in hexadecimal format. 24. CPU performance is dependent upon instruction count, cycles per instruction and clock cycle rate. 25. SRAM, used in CPU cache is faster, more expensive and need not be constantly refreshed when compared to DRAM. 26. The original x8 27. Registers in the CPU provide permanent storage for data of program being currenty executed 28. In serial processing, computers do more than one thing at a time, in a distinct series of operations. 29. The faster the clock rate the more instructions the CPU can execute per second. 30. CISC processors utilize grater memory and run faster than RISC processors 6 processor instruction set i s common to most computers today d.very easy b. difficult but fair c. easy a. very difficult 31. Overall this quiz was Show transcribed image text
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Answer to Infoddeti H Operating System Quiz 1 Winter 2019 Von Neumann Architecture Refers Design Ce Q34284516 . . .
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